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ML7037-002
Dual Echo Canceler & Noise Canceler with Dual Codec for Hands-Free
 

Documents

»  PDF of this Data Sheet (251 KB) is available. ML7037-002_DS_v2.pdf
»  Evaluation Board. ML7037-002 Evaluation Board Manual

Applications

»  Hands-free Solutions

Description

The ML7037-002 is an IC device developed for portable, handsfree communication with built-in line echo canceler, acoustic echo canceler, and transmission signal noise canceler. Built-in to the voice signal interface is a PCM linear CODEC for the analog interface on the acoustic-side, and a PCM linear CODEC for the analog interface on the line-side. On the line-side, in addition to the analog interface, there is also a µ-law PCM/16-bit linear digital interface. Equipped with gain and mute controls for data transmission and reception, a µ-law PCM/16-bit linear digital interface for memo recording and message output, and transfer clock and sync clock generators for digital communication, this device is ideally suited for a handsfree system.

 

Block Diagrams


 

Features

»  Single 3 V Power Supply Operation (3.0 to 3.6 V) [with built-in regulator to generate internal power supply]
»  Built-in 2-channel (line and acoustic) echo canceler
»  Echo attenuation: 35 dB (typ.) for white noise
»  Cancelable echo delay time:
»  Single echo canceler mode (only an acoustic echo canceler is enabled) Tacoud = 100 ms (max.)
»  Dual echo canceler mode (both of an acoustic and line echo cancelers are enabled) Tacoud = 100 ms; Tlined = 20 ms
»  Built-in transmission signal noise canceler
»  Noise attenuation : 17 dB (typ.) for white noise 40 dB (typ.) for single tone
»  Built-in 2-channel CODEC
»  Synchronous transmission and reception enables full duplex operation
»  Built-in analog input gain amp stage (max. gain = 30 dB)
»  Analog output configuration: Push-pull drive (can drive a 2.0 k load)
»  Receive-side ALC’s (Auto Level Controlers)
»  Programmable Gain/Mute
»  A slope filter on transmit side
»  16 GPI’s and 5 GPO’s
»  Speech digital interface coding formats: µ-law PCM (G.711 [64kbps]), 16-bit linear (2's complement)
»  Speech digital interface sync formats : Long-frame-sync, short-frame-sync
»  PCM shift clocks (BCLK)
»  Clock slave mode : 64kHz to 2.048MHz (µ-law PCM) / 128kHz to 2.048MHz (16bit Linear PCM)
»  Digital transmission rate
»  External input: 64 kbps to 2048 kbps
»  Internal generation: 64 kbps (µ-law PCM)/128 kbps (16-bit linear)
»  Fixed digital interface sync clock (SYNC) enables automatic power-down
»  Master clock frequency: 19.2 MHz
Compatible with crystal oscillator and crystal
»  Low power consumption
»  Operating mode: typ. 35 mW (when VDD = 3.0 V in a silent mode)
»  Power-down mode: typ. 0.02 mW (when VDD = 3.0 V in a silent mode)
»  Control by both the serial microcomputer interface and parallel port is possible
»  Transmit / receive mute function, transmit/receive programmable gain setting
»  Package: 64-pin plastic QFP (QFP64-P-1414-0.80-BK) (Product name: ML7037-002)