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W-CSP Technology

Oki's Wafer Level Chip Size Packages (W-CSP) offers design engineers a thinner, smaller, lighter weight packaging option to help solve today's critical design issues. The demand for smaller, more portable products with increased functionality is fueling growth in many markets and applications. This demand has helped make W-CSP one of the fastest growing areas of IC packaging technology. Click here to learn more.

For detailed board mounting information Click here to download an Application Note on PC-Board Layout Techniques for Oki's ML67Q4060/4061 ARM7 W-CSP Packaged Devices.


RoHS - Lead Free Pacakaging
The RoHS Directive stands for "the Restriction of the use Of certain Hazardous Substances in electrical and electronic equipment".  This Directive bans the placing on the EU market of new electrical and electronic equipment containing more than agreed levels of lead, cadmium, mercury, hexavalent chromium, polybrominated biphenyl (PBB) and polybrominated diphenyl ether (PBDE) flame retardants.


Packaging
Oki Semiconductor offers comprehensive package options to meet the requirements of today's electronics industry. This area presents information about Oki's package outlines and dimensions, surface mount technology, markings and packing.

»  Package Classification (1,678,751 KB)
»  Package Outlines (360 KB)
»  Handling Guide (110 KB)
»  SMD Technology (270 KB)
»  Thermal Resistance(130 KB)
»  Package Body Marking (60 KB)
»  Packing (tubes, trays, tape reels) (510 KB)
»  Socket References (30 KB)

Selection Guide