ML9261A Documents
Description Display data is serially stored in the shift register at the rising edge of a
clock pulse. Setting the CL pin low allows all the VFD tube driving circuits to
be driven low, which makes it possible to set the display blanking.
Also, setting both of the CL and CHG pins high allows all the VFD tube
driving circuits to be driven high, which provides the easy testing of all
lights after final assembly of a VFD tube panel. |
